Apple Patent | Displays With Multiple Scanning Modes

Patent: Displays With Multiple Scanning Modes

Publication Number: 20200118497

Publication Date: 20200416

Applicants: Apple

Abstract

An electronic device may include a display such as a light-emitting diode display. The electronic device may be a head-mounted device that provides a virtual reality or augmented reality environment to a user. To reduce artifacts in the display, a display may be operable in both a normal scanning mode and a partial scanning mode. In the normal scanning mode, every row of the display may be enabled to emit light in each frame. In the partial scanning mode, only a subset of the rows of the display may be enabled to emit light in each frame. The display may have a higher refresh rate in the partial scanning mode than in the normal scanning mode. To ensure uniform transistor stress across the display, the scanning driver for the display may scan the disabled rows in the partial scanning mode even though the rows will not be used to emit light.

[0001] This application is a continuation of non-provisional patent application Ser. No. 16/577,597, filed Sep. 20, 2019, which is division of non-provisional patent application Ser. No. 15/384,096, filed Dec. 19, 2016, which claims the benefit of provisional patent application No. 62/385,411, filed on Sep. 9, 2016, and provisional patent application No. 62/422,718, filed on Nov. 16, 2016, all of which are hereby incorporated by reference herein in their entireties.

BACKGROUND

[0002] This relates generally to displays, and, more particularly, to displays with multiple scanning modes.

[0003] Electronic devices often include displays. For example, cellular telephones and portable computers include displays for presenting information to users. An electronic device may have an organic light-emitting diode display based on organic-light-emitting diode pixels or a liquid crystal display based on liquid crystal pixels. Displays may be incorporated in devices that are mounted on a user’s head such as virtual reality and augmented reality headsets.

[0004] It can be challenging to design devices such as these. The display may have a high resolution and may sometimes need to operate at a high refresh rate, resulting in each row in the display having a low scan time. This may result in poor display uniformity and other visible artifacts.

[0005] It would therefore be desirable to be able to provide an improved display that can operate at normal and high refresh rates.

SUMMARY

[0006] An electronic device may include a display such as a light-emitting diode display. The electronic device may be a head-mounted device that provides a virtual reality or augmented reality environment to the user.

[0007] Displays may be provided with high resolution and may operate with high refresh rates. To reduce image artifacts in the display at high refresh rates, a display may be operable in both a normal scanning mode and a partial scanning mode. In the normal scanning mode, every row of the display may be scanned in each frame. In the partial scanning mode, only a subset of the rows of the display may be scanned in each frame. The display may have a higher refresh rate in the partial scanning mode than in the normal scanning mode.

[0008] The display may include an array of pixels formed in an active area of the display, display driver circuitry formed in an inactive area of the display that is configured to provide image data to the pixels, and gate driver circuitry formed in the inactive area of the display. The gate driver circuitry may include a shift register that includes a plurality of register circuits. Each register circuit may have at least one output that is provided to a corresponding row of pixels. At least one register circuit in the shift register may have a first input and a second input that is different than the first input. The first input may be used when the display operates in the normal scanning mode and the second input may be used when the display operates in the partial scanning mode.

[0009] The display may be divided into sections, some of which are enabled only during the normal scanning mode. During the partial scanning mode, some of the sections may be disabled. The gate driver circuitry may include a gate driver and an emission driver with portions that correspond to respective sections of the display.

[0010] By selectively disabling sections of the display during the partial scanning mode, display performance may be improved and power may be conserved. However, the display sections that are disabled during the partial scanning mode may experience less thin film transistor (TFT) stress than the display sections that are not disabled during the partial scanning mode. Over time, this imbalance in TFT stress may cause visible artifacts in the display. To equalize the amount of permanent TFT stress in each section of the display, the scan driver of the sections that are disabled during the partial scanning mode may still scan the disabled rows during the partial scanning mode (even though the disabled rows do not display images).

BRIEF DESCRIPTION OF THE DRAWINGS

[0011] FIG. 1 is a schematic diagram of an illustrative electronic device having a display in accordance with an embodiment.

[0012] FIG. 2 is a schematic diagram of an illustrative display in accordance with an embodiment.

[0013] FIG. 3 is a diagram of an illustrative pixel circuit in accordance with an embodiment.

[0014] FIG. 4 is a top view of an illustrative display showing how the display’s gate driver circuitry may include one or more gate drivers and one or more emission drivers in accordance with an embodiment.

[0015] FIG. 5 is a schematic diagram of an illustrative shift register that may be used to form a gate driver or an emission driver for a display in accordance with an embodiment.

[0016] FIG. 6 is a schematic diagram of an illustrative register circuit that may be used in the shift register of FIG. 5 in accordance with an embodiment.

[0017] FIG. 7 is a timing diagram showing how a shift register that forms a gate driver for a display may assert various control signals in accordance with an embodiment.

[0018] FIG. 8 is a timing diagram showing how a shift register that forms an emission driver for a display may assert various control signals in accordance with an embodiment.

[0019] FIG. 9 is a top view of an illustrative display showing how the display may include a gate driver that is split into several portions and an emission driver that is split into several portions in accordance with an embodiment.

[0020] FIG. 10A is a diagram showing the scanning scheme of an illustrative display while the display operates in a normal scanning mode in accordance with an embodiment.

[0021] FIG. 10B is a diagram showing the scanning scheme of an illustrative display while the display operates in a partial scanning mode in accordance with an embodiment.

[0022] FIG. 11 is a schematic diagram of an illustrative shift register that may be used to form a gate driver or an emission driver for a display that can operate in a normal scanning mode and a partial scanning mode in accordance with an embodiment.

[0023] FIG. 12 is a schematic diagram of an illustrative register circuit that may be used in the shift register of FIG. 11 in accordance with an embodiment.

[0024] FIG. 13 is a top view of an illustrative display showing how the display may include a gate driver that is split into several portions and an emission driver that is split into several portions in accordance with an embodiment.

[0025] FIGS. 14A-14D are diagrams showing driving sequences for illustrative emission drivers and scan drivers that are operable in a partial scanning mode in accordance with an embodiment.

[0026] FIG. 15 is a diagram of an illustrative scan driver that does not scan disabled rows of the display in the partial scanning mode in accordance with an embodiment.

[0027] FIG. 16 is a diagram showing the scanning scheme of an illustrative display while the display operates in a normal scanning mode using the scan driver of FIG. 15 in accordance with an embodiment.

[0028] FIG. 17 is a diagram showing the scanning scheme of an illustrative display while the display operates in a partial scanning mode using the scan driver of FIG. 15 in accordance with an embodiment.

[0029] FIG. 18 is a diagram of an illustrative scan driver that scans disabled rows of the display in the partial scanning mode in accordance with an embodiment.

[0030] FIG. 19 is a diagram showing the scanning scheme of an illustrative display while the display operates in a partial scanning mode using the scan driver of FIG. 18 in accordance with an embodiment.

[0031] FIG. 20 is a diagram of an illustrative scan driver that scans disabled rows of the display in the partial scanning mode during the vertical blanking period in accordance with an embodiment.

[0032] FIG. 21 is a diagram showing the scanning scheme of an illustrative display while the display operates in a partial scanning mode using the scan driver of FIG. 20 in accordance with an embodiment.

[0033] FIG. 22 is a diagram showing the scanning scheme of an illustrative display that uses four clock signals while the display operates in a partial scanning mode in accordance with an embodiment.

[0034] FIGS. 23A and 23B are illustrative timing diagrams of clock signals and the gate signals asserted by a scanning driver in accordance with an embodiment.

[0035] FIG. 24 is a diagram showing the scanning scheme of an illustrative display that begins scanning the next frame before finishing the scanning of the current frame in accordance with an embodiment.

[0036] FIG. 25 is a schematic diagram of illustrative circuitry used to operate a display in accordance with an embodiment.

[0037] FIGS. 26 and 27 are diagrams showing illustrative scanning schemes for performing a scan of the type shown in FIG. 24 in accordance with an embodiment.

DETAILED DESCRIPTION

[0038] An illustrative electronic device of the type that may be provided with a display is shown in FIG. 1. Electronic device 10 may be a computing device such as a laptop computer, a computer monitor containing an embedded computer, a tablet computer, a cellular telephone, a media player, or other handheld or portable electronic device, a smaller device such as a wrist-watch device, a pendant device, a headphone or earpiece device, a device embedded in eyeglasses or other equipment worn on a user’s head, or other wearable or miniature device, a display, a computer display that contains an embedded computer, a computer display that does not contain an embedded computer, a gaming device, a navigation device, an embedded system such as a system in which electronic equipment with a display is mounted in a kiosk or automobile, or other electronic equipment. Electronic device 10 may have the shape of a pair of eyeglasses (e.g., supporting frames), may form a housing having a helmet shape, or may have other configurations to help in mounting and securing the components of one or more displays on the head or near the eye of a user.

[0039] As shown in FIG. 1, electronic device 10 may have control circuitry 16. Control circuitry 16 may include storage and processing circuitry for supporting the operation of device 10. The storage and processing circuitry may include storage such as hard disk drive storage, nonvolatile memory (e.g., flash memory or other electrically-programmable-read-only memory configured to form a solid state drive), volatile memory (e.g., static or dynamic random-access-memory), etc. Processing circuitry in control circuitry 16 may be used to control the operation of device 10. The processing circuitry may be based on one or more microprocessors, microcontrollers, digital signal processors, baseband processors, power management units, audio chips, application specific integrated circuits, etc.

[0040] Input-output circuitry in device 10 such as input-output devices 18 may be used to allow data to be supplied to device 10 and to allow data to be provided from device 10 to external devices. Input-output devices 18 may include buttons, joysticks, scrolling wheels, touch pads, key pads, keyboards, microphones, speakers, tone generators, vibrators, cameras, sensors, light-emitting diodes and other status indicators, data ports, etc. A user can control the operation of device 10 by supplying commands through input-output devices 18 and may receive status information and other output from device 10 using the output resources of input-output devices 18.

[0041] Input-output devices 18 may include one or more displays such as display 14. Display 14 may be a touch screen display that includes a touch sensor for gathering touch input from a user or display 14 may be insensitive to touch. A touch sensor for display 14 may be based on an array of capacitive touch sensor electrodes, acoustic touch sensor structures, resistive touch components, force-based touch sensor structures, a light-based touch sensor, or other suitable touch sensor arrangements.

[0042] Control circuitry 16 may be used to run software on device 10 such as operating system code and applications. During operation of device 10, the software running on control circuitry 16 may display images on display 14.

[0043] Display 14 may be an organic light-emitting diode display, a display formed from an array of discrete light-emitting diodes each formed from a crystalline semiconductor die, or any other suitable type of display. Configurations in which the pixels of display 14 include light-emitting diodes are sometimes described herein as an example. This is, however, merely illustrative. Any suitable type of display may be used for device 10, if desired.

[0044] FIG. 2 is a diagram of an illustrative display. As shown in FIG. 2, display 14 may include layers such as substrate layer 26. Substrate layers such as layer 26 may be formed from rectangular planar layers of material or layers of material with other shapes (e.g., circular shapes or other shapes with one or more curved and/or straight edges). The substrate layers of display 14 may include glass layers, polymer layers, composite films that include polymer and inorganic materials, metallic foils, etc.

[0045] Display 14 may have an array of pixels 22 for displaying images for a user such as pixel array 28. Pixels 22 in array 28 may be arranged in rows and columns. The edges of array 28 may be straight or curved (i.e., each row of pixels 22 and/or each column of pixels 22 in array 28 may have the same length or may have a different length). There may be any suitable number of rows and columns in array 28 (e.g., ten or more, one hundred or more, or one thousand or more, etc.). Display 14 may include pixels 22 of different colors. As an example, display 14 may include red pixels, green pixels, and blue pixels. If desired, a backlight unit may provide backlight illumination for display 14.

[0046] Display driver circuitry 20 may be used to control the operation of pixels 28. Display driver circuitry 20 may be formed from integrated circuits, thin-film transistor circuits, and/or other suitable circuitry. Illustrative display driver circuitry 20 of FIG. 2 includes display driver circuitry 20A and additional display driver circuitry such as gate driver circuitry 20B. Gate driver circuitry 20B may be formed along one or more edges of display 14. For example, gate driver circuitry 20B may be arranged along the left and right sides of display 14 as shown in FIG. 2. Gate driver circuitry 20B may include gate drivers and emission drivers.

[0047] As shown in FIG. 2, display driver circuitry 20A (e.g., one or more display driver integrated circuits, thin-film transistor circuitry, etc.) may contain communications circuitry for communicating with system control circuitry over signal path 24. Path 24 may be formed from traces on a flexible printed circuit or other cable. The control circuitry may be located on one or more printed circuits in electronic device 10. During operation, the control circuitry (e.g., control circuitry 16 of FIG. 1) may supply circuitry such as a display driver integrated circuit in circuitry 20 with image data for images to be displayed on display 14. Display driver circuitry 20A of FIG. 2 is located at the top of display 14. This is merely illustrative. Display driver circuitry 20A may be located at both the top and bottom of display 14 or in other portions of device 10.

[0048] To display the images on pixels 22, display driver circuitry 20A may supply corresponding image data to data lines D while issuing control signals to supporting display driver circuitry such as gate driver circuitry 20B over signal paths 30. With the illustrative arrangement of FIG. 2, data lines D run vertically through display 14 and are associated with respective columns of pixels 22.

[0049] Gate driver circuitry 20B (sometimes referred to as gate line driver circuitry or horizontal control signal circuitry) may be implemented using one or more integrated circuits and/or may be implemented using thin-film transistor circuitry on substrate 26. Horizontal control lines G (sometimes referred to as gate lines, scan lines, emission control lines, etc.) run horizontally through display 14. Each gate line G is associated with a respective row of pixels 22. If desired, there may be multiple horizontal control lines such as gate lines G associated with each row of pixels. Individually controlled and/or global signal paths in display 14 may also be used to distribute other signals (e.g., power supply signals, etc.).

[0050] Gate driver circuitry 20B may assert control signals on the gate lines G in display 14. For example, gate driver circuitry 20B may receive clock signals and other control signals from circuitry 20A on paths 30 and may, in response to the received signals, assert a gate line signal on gate lines G in sequence, starting with the gate line signal G in the first row of pixels 22 in array 28. As each gate line is asserted, data from data lines D may be loaded into a corresponding row of pixels. In this way, control circuitry such as display driver circuitry 20A and 20B may provide pixels 22 with signals that direct pixels 22 to display a desired image on display 14. Each pixel 22 may have a light-emitting diode and circuitry (e.g., thin-film circuitry on substrate 26) that responds to the control and data signals from display driver circuitry 20.

[0051] An illustrative pixel circuit of the type that may be used for each pixel 22 in array 28 is shown in FIG. 3. In the example of FIG. 3, pixel circuit 22 has seven transistors T1, T2, T3, T4, T5, T6, and T7 and one capacitor Cst, so pixel circuit 22 may sometimes be referred to as a 7T1C pixel circuit. Other numbers of transistors and capacitors may be used in pixels 22 if desired. The transistors may be p-channel transistors and/or may be n-channel transistors or other types of transistors. The active regions of thin-film transistors for pixel circuit 22 and other portions of display 14 may be formed from silicon (e.g., polysilicon channel regions), semiconducting oxides (e.g., indium gallium zinc oxide channel regions), or other suitable semiconductor thin-film layers.

[0052] As shown in FIG. 3, pixel circuit 22 includes light-emitting diode 44 (e.g., an organic light-emitting diode, a crystalline micro-light-emitting diode die, etc.). Light-emitting diode 44 may emit light 46 in proportion to the amount of current I that is driven through light-emitting diode 44 by transistor T1. Transistor T5, Transistor T1, Transistor T6, and light-emitting diode 44 may be coupled in series between respective power supply terminals (see, e.g., positive power supply terminal 40 (ELVDD) and ground power supply terminal 42 (ELVSS). Transistor T1 may have a source terminal (S) coupled to positive power supply terminal 40, a drain terminal (D) coupled to node N2, and a gate terminal coupled to node N1. The terms “source” and “drain” terminals of a transistor can sometimes be used interchangeably and may therefore be referred to herein as “source-drain” terminals. The voltage on node N1 at the gate of transistor T1 controls the amount of current I that is produced by transistor T1. This current is driven through light-emitting diode 44, so transistor T1 may sometimes be referred to as a drive transistor.

[0053] Transistors T5 and T6 can be turned off to interrupt current flow between transistor T1 and diode 44 and may be turned on to enable current flow between transistor T1 and diode 44. Emission enable control signal EM is applied to the gates of transistors T5 and T6. During operation, transistors T5 and T6 are controlled by emission enable control signal EM and are sometimes referred to as emission transistors or emission enable transistors. Control signals GW and GI, which may sometimes be referred to as switching transistor control signals, are applied to the gates of switching transistors T2, T3, T4, and T7 and control the operation of transistors T2, T3, T4, and T7. In particular, control signal GW is used to control transistors T2 and T3, while control signal GI is used to control transistors T4 and T7. The capacitor Cst of pixel circuit 22 may be used for data storage. Pixel 22 may also include reference voltage terminal 38 (VINI). Reference voltage terminal 38 may be used to supply a reference voltage (e.g., VINI may be approximately -3.4 Volts or any other desired voltage).

[0054] Operation of pixel 22 may be generally have two primary phases: a data writing phase and an emission phase. During the data writing phase, data may be loaded from data lines D (labeled as DATA in FIG. 3) to node N1. The data may be a data voltage that is loaded to Node 1 by turning on transistors T2, T1, and T3. After the data voltage has been loaded into pixel 22, display driver circuitry 20 places pixel 22 in its emission state. During the emission state, the value of the data voltage on node N1 controls the state of drive transistor T1 and thereby controls the amount of light 46 emitted by light-emitting diode 44.

[0055] It should be noted that manufacturing variations and variations in operating conditions can cause the threshold voltages of drive transistor T1 to vary. This may cause pixel brightness fluctuations which may give rise to undesired visible artifacts on a display. To help reduce visible artifacts, display 14 may employ any desired threshold voltage compensation techniques to compensate for threshold voltage variation in drive transistor T1.

[0056] The example of a 7T1C light-emitting diode pixel shown in FIG. 3 is merely illustrative. If desired, the transistors of the pixel may have a different arrangement than the arrangement shown in FIG. 3. Additional transistors or fewer transistors may be included in the pixel if desired.

[0057] FIG. 4 shows a top view of an illustrative display with gate driver circuitry that includes a gate driver and an emission driver. Gate driver circuitry 20B may be formed along one or more edges of display 14. FIG. 4 shows an example where gate driver circuitry 20B is formed on opposing sides of pixel array 28 (sometimes referred to as an active area). For example, gate driver circuitry 20B may be arranged along the left and right sides of display 14. Gate driver circuitry 20B may include gate drivers (sometimes referred to as scan drivers or scanning drivers) and emission drivers on each side of the active area. FIG. 4 shows gate drivers 52 and emission drivers 54 on opposing sides of the active area. The gate drivers may be configured to supply control signals to each pixel in the display (i.e., the gate drivers may supply switching transistor control signals GW and GI to transistors T2, T3, T4, and T7 in each pixel 22 of FIG. 3). The emission drivers may be configured to supply an emission enable control signal EM to the gates of transistors such as transistors T5 and T6 of pixel 22 in FIG. 3. The emission and gate drivers may be used to address a respective half of the pixel array. For example, the gate driver 52 to the left of the active area may be used to address pixels on the left half of the display, and the gate driver 52 to the right of the active area may be used to address pixels on the right half of the display. Similarly, the emission driver 54 to the left of the active area may be used to address pixels on the left half of the display, and the emission driver 54 to the right of the active area may be used to address pixels on the right half of the display.